SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced a wide range of leading semiconductor and system customers have successfully adopted the comprehensive ...

The complexity of integrated circuit (IC) design has expanded a billion-fold since the invention of the first transistor, guided by the famous “Moore’s Law” of the semiconductor world. An important ...

Creating reusable and portable analog intellectual property (IP) is a key trend to watch in EDA for 2009 and beyond. Finding a way to develop reusable analog IP will allow designers to build ...

New process device profiles have been added by ODVA to the EtherNet/IP specification to provide end users with another tool to help optimize plant operations. According to ODVA, the new process device ...

Multi-standard memory interface IP allows a wide range of memory devices targeting high-capacity, high-speed, low-power and low-cost applications SAN JOSE, Calif.--(BUSINESS WIRE)-- Cadence Design ...

A new 12-bit analog-to-digital converter (ADC) IP claims to have a unique value proposition: it’s process agnostic. You can generate transistor-level schematics, pick the process for specific needs, ...

From a silicon design perspective, the industry has long held the notion that power consumption can be reduced simply by porting chips forward to the next process technology node. Yet as more consumer ...

Process maintenance teams have long been challenged with gaining access and connectivity to service their field-level devices. Traditionally, plant personnel needed to walk out to the processing area ...